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#	Item
661	A Multi-threaded 64 Bit PowerPC Commercial RISC Processor IBM Server Group Rochester, MN Add to Reading List Source URL: www.hotchips.org Language: English - Date: 2013-07-27 22:49:02 Central processing unit Computer memory Virtual memory CPU cache Cache Threads Memory management unit Multithreading Translation lookaside buffer Computer hardware Computing Computer architecture
662	Performance Characteristics of the i960 CA SuperScalar Microprocessor s. McGeady Add to Reading List Source URL: www.hotchips.org Language: English - Date: 2013-07-27 22:44:01 Classes of computers Central processing unit Microprocessors Parallel computing Superscalar Intel i960 Microarchitecture Reduced instruction set computing CPU cache Computer hardware Computing Computer architecture
663	HOT CHIPS SYMPOSIUM III PA-RISC PROCESSOR FOR ·SNAKES· WORKSTATIONS TECHNICAL OVERVIEW Charlie Kohlhardt R&D Section Manager Add to Reading List Source URL: www.hotchips.org Language: English - Date: 2013-07-27 22:44:27 Central processing unit Computer memory Virtual memory Instruction set architectures CPU cache Cache PA-RISC Reduced instruction set computing Memory management unit Computer architecture Computer hardware Computing
664	Ubicom Strawman Framework Add to Reading List Source URL: www.hotchips.org Language: English - Date: 2013-08-12 00:06:14 Central processing unit Microcontrollers Parallel computing Threads Microprocessors CPU cache Multithreading Parallax Propeller ETRAX CRIS Computer architecture Computing Computer hardware
665	Programming the FlexRAM ∗ Parallel Intelligent Memory System Basilio B. Fraguela Jose Renau† Add to Reading List Source URL: iacoma.cs.uiuc.edu Language: English - Date: 2003-04-16 22:38:29 Computer architecture Central processing unit Microprocessors CPU cache Computer memory OpenMP Microarchitecture Stream processing TRIPS architecture Computing Computer hardware Parallel computing
666	The HP PA-8000 RISC CPU A High Performance Out-of-Order Processor Ashok Kumar Hot Chips VIII Add to Reading List Source URL: www.hotchips.org Language: English - Date: 2013-07-27 22:47:33 Central processing unit Instruction set architectures PA-8000 Microprocessors PA-RISC Reduced instruction set computing CPU cache Microarchitecture Runway bus Computer architecture Computer hardware Computing
667	SPEC GaAs SPARCTM RISC Processor Developed by Systems & Processes Engineering Corporation (SPEC) Add to Reading List Source URL: www.hotchips.org Language: English - Date: 2013-07-27 22:43:55 CPU cache Cache Central processing unit Computer memory Reduced instruction set computing Instruction set architectures Computer hardware Computer architecture Computing
668	Symtavision_TraceAnalyzer_overview_EN_1502 Add to Reading List Source URL: www.symtavision.com Language: English - Date: 2015-01-22 05:04:47 CPU cache Cache Central processing unit Computer memory Computer hardware AUTOSAR Visualization Science Avionics Full-Duplex Switched Ethernet Infographics Software architecture Computing
669	UltraSPARC III: A 600 MHz 64-bit Superscalar Processor for 1000-Way Scalable Systems Bill Lynch Add to Reading List Source URL: www.hotchips.org Language: English - Date: 2013-07-27 22:48:30 Cache Computer memory UltraSPARC III UltraSPARC II R8000 AMD 10h Computer hardware Central processing unit CPU cache
670	A PowerPC compatible ® processor supporting highperformance 3-D graphics PETER SANDON Add to Reading List Source URL: www.hotchips.org Language: English - Date: 2013-07-27 23:39:03 Instruction set architectures Computer memory CPU cache Cache Central processing unit Gekko Embedded microprocessors Vortex86 R8000 Computer hardware Computer architecture Computing

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